view runtime/ftplugin/systemverilog.vim @ 34596:5a8340e044f4 v9.1.0190

patch 9.1.0190: complete_info() returns wrong order of items Commit: https://github.com/vim/vim/commit/8950bf7f8b85c1287d4e696965d88091fcc60594 Author: Girish Palya <girishji@gmail.com> Date: Wed Mar 20 20:07:29 2024 +0100 patch 9.1.0190: complete_info() returns wrong order of items Problem: complete_info() returns wrong order of items (after v9.0.2018) Solution: Revert Patch v9.0.2018 (Girish Palya) bug fix: complete_info() gives wrong results 1) complete_info() reverses list of items during <c-p> 2) 'selected' item index is wrong during <c-p> 3) number of items returnd can be wrong Solution: - Decouple 'cp_number' from 'selected' index since they need not be correlated - Do not iterate the list backwards - Add targeted tests Regression introduced by https://github.com/vim/vim/commit/69fb5afb3bc9da24c2fb0eafb0027ba9c6502fc2 Following are unnecessary commits to patch problems from above: https://github.com/vim/vim/commit/fef66301665027f1801a18d796f74584666f41ef https://github.com/vim/vim/commit/daef8c74375141974d61b85199b383017644978c All the tests from above commits are retained though. fixes: #14204 closes: #14241 Signed-off-by: Girish Palya <girishji@gmail.com> Signed-off-by: Christian Brabandt <cb@256bit.org>
author Christian Brabandt <cb@256bit.org>
date Wed, 20 Mar 2024 20:15:03 +0100
parents 11b656e74444
children
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" Vim filetype plugin file
" Language:    SystemVerilog
" Maintainer:  kocha <kocha.lsifrontend@gmail.com>
" Last Change: 07-May-2021

if exists("b:did_ftplugin")
  finish
endif

" Behaves just like Verilog
runtime! ftplugin/verilog.vim

let s:cpo_save = &cpo
set cpo&vim

" Add SystemVerilog keywords for matchit plugin.
if exists("loaded_matchit")
  let b:match_words =
    \ '\<begin\>:\<end\>,' .
    \ '\<case\>\|\<casex\>\|\<casez\>:\<endcase\>,' .
    \ '\<module\>:\<endmodule\>,' .
    \ '\<if\>:`\@<!\<else\>,' .
    \ '\<function\>:\<endfunction\>,' .
    \ '`ifn\?def\>:`elsif\>:`else\>:`endif\>,' .
    \ '\<task\>:\<endtask\>,' .
    \ '\<specify\>:\<endspecify\>,' .
    \ '\<config\>:\<endconfig\>,' .
    \ '\<generate\>:\<endgenerate\>,' .
    \ '\<fork\>:\<join\>\|\<join_any\>\|\<join_none\>,' .
    \ '\<primitive\>:\<endprimitive\>,' .
    \ '\<table\>:\<endtable\>,' .
    \ '\<checker\>:\<endchecker\>,' .
    \ '\<class\>:\<endclass\>,' .
    \ '\<clocking\>:\<endclocking\>,' .
    \ '\<group\>:\<endgroup\>,' .
    \ '\<interface\>:\<endinterface\>,' .
    \ '\<package\>:\<endpackage\>,' .
    \ '\<program\>:\<endprogram\>,' .
    \ '\<property\>:\<endproperty\>,' .
    \ '\<sequence\>:\<endsequence\>'
endif

let &cpo = s:cpo_save
unlet s:cpo_save