diff runtime/ftplugin/systemverilog.vim @ 24636:840665e74421

Update runtime files Commit: https://github.com/vim/vim/commit/3ec3217f0491e9ba8aa8ea02f7e454cd19a287ef Author: Bram Moolenaar <Bram@vim.org> Date: Sun May 16 12:39:47 2021 +0200 Update runtime files
author Bram Moolenaar <Bram@vim.org>
date Sun, 16 May 2021 12:45:04 +0200
parents 1dea14d4c738
children 11b656e74444
line wrap: on
line diff
--- a/runtime/ftplugin/systemverilog.vim
+++ b/runtime/ftplugin/systemverilog.vim
@@ -1,7 +1,7 @@
 " Vim filetype plugin file
 " Language:    SystemVerilog
 " Maintainer:  kocha <kocha.lsifrontend@gmail.com>
-" Last Change: 12-Aug-2013. 
+" Last Change: 07-May-2021
 
 if exists("b:did_ftplugin")
   finish
@@ -9,3 +9,36 @@ endif
 
 " Behaves just like Verilog
 runtime! ftplugin/verilog.vim
+
+let s:cpo_save = &cpo
+set cpo&vim
+
+" Add SystemVerilog keywords for matchit plugin.
+if exists("loaded_matchit")
+  let b:match_words =
+    \ '\<begin\>:\<end\>,' .
+    \ '\<case\>\|\<casex\>\|\<casez\>:\<endcase\>,' .
+    \ '\<module\>:\<endmodule\>,' .
+    \ '\<if\>:`\@<!\<else\>,' .
+    \ '\<function\>:\<endfunction\>,' .
+    \ '`ifn\?def\>:`elsif\>:`else\>:`endif\>,' .
+    \ '\<task\>:\<endtask\>,' .
+    \ '\<specify\>:\<endspecify\>,' .
+    \ '\<config\>:\<endconfig\>,' .
+    \ '\<generate\>:\<endgenerate\>,' .
+    \ '\<fork\>:\<join\>\|\<join_any\>\|\<join_none\>,' .
+    \ '\<primitive\>:\<endprimitive\>,' .
+    \ '\<table\>:\<endtable\>,' .
+    \ '\<checker\>:\<endchecker\>,' .
+    \ '\<class\>:\<endclass\>,' .
+    \ '\<clocking\>:\<endclocking\>,' .
+    \ '\<gruop\>:\<endgruop\>,' .
+    \ '\<interface\>:\<endinterface\>,' .
+    \ '\<package\>:\<endpackage\>,' .
+    \ '\<program\>:\<endprogram\>,' .
+    \ '\<property\>:\<endproperty\>,' .
+    \ '\<sequence\>:\<endsequence\>'
+endif
+
+let &cpo = s:cpo_save
+unlet s:cpo_save