Mercurial > vim
comparison runtime/syntax/verilog.vim @ 10048:43efa4f5a8ea
commit https://github.com/vim/vim/commit/89bcfda6834aba724d12554a34b9ed49f5789fd5
Author: Bram Moolenaar <Bram@vim.org>
Date: Tue Aug 30 23:26:57 2016 +0200
Updated runtime files. Remove version checks for Vim older than 6.0.
author | Christian Brabandt <cb@256bit.org> |
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date | Tue, 30 Aug 2016 23:30:09 +0200 |
parents | 3502a7f991fc |
children | 46763b01cd9a |
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10047:a62862410ca1 | 10048:43efa4f5a8ea |
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1 " Vim syntax file | 1 " Vim syntax file |
2 " Language: Verilog | 2 " Language: Verilog |
3 " Maintainer: Mun Johl <Mun.Johl@emulex.com> | 3 " Maintainer: Mun Johl <Mun.Johl@emulex.com> |
4 " Last Update: Wed Jul 20 16:04:19 PDT 2011 | 4 " Last Update: Wed Jul 20 16:04:19 PDT 2011 |
5 | 5 |
6 " For version 5.x: Clear all syntax items | 6 " quit when a syntax file was already loaded |
7 " For version 6.x: Quit when a syntax file was already loaded | 7 if exists("b:current_syntax") |
8 if version < 600 | |
9 syntax clear | |
10 elseif exists("b:current_syntax") | |
11 finish | 8 finish |
12 endif | 9 endif |
13 | 10 |
14 " Set the local value of the 'iskeyword' option. | 11 " Set the local value of the 'iskeyword' option. |
15 " NOTE: '?' was added so that verilogNumber would be processed correctly when | 12 " NOTE: '?' was added so that verilogNumber would be processed correctly when |
16 " '?' is the last character of the number. | 13 " '?' is the last character of the number. |
17 if version >= 600 | 14 setlocal iskeyword=@,48-57,63,_,192-255 |
18 setlocal iskeyword=@,48-57,63,_,192-255 | |
19 else | |
20 set iskeyword=@,48-57,63,_,192-255 | |
21 endif | |
22 | 15 |
23 " A bunch of useful Verilog keywords | 16 " A bunch of useful Verilog keywords |
24 | 17 |
25 syn keyword verilogStatement always and assign automatic buf | 18 syn keyword verilogStatement always and assign automatic buf |
26 syn keyword verilogStatement bufif0 bufif1 cell cmos | 19 syn keyword verilogStatement bufif0 bufif1 cell cmos |
100 "Modify the following as needed. The trade-off is performance versus | 93 "Modify the following as needed. The trade-off is performance versus |
101 "functionality. | 94 "functionality. |
102 syn sync minlines=50 | 95 syn sync minlines=50 |
103 | 96 |
104 " Define the default highlighting. | 97 " Define the default highlighting. |
105 " For version 5.7 and earlier: only when not done already | 98 " Only when an item doesn't have highlighting yet |
106 " For version 5.8 and later: only when an item doesn't have highlighting yet | 99 command -nargs=+ HiLink hi def link <args> |
107 if version >= 508 || !exists("did_verilog_syn_inits") | |
108 if version < 508 | |
109 let did_verilog_syn_inits = 1 | |
110 command -nargs=+ HiLink hi link <args> | |
111 else | |
112 command -nargs=+ HiLink hi def link <args> | |
113 endif | |
114 | 100 |
115 " The default highlighting. | 101 " The default highlighting. |
116 HiLink verilogCharacter Character | 102 HiLink verilogCharacter Character |
117 HiLink verilogConditional Conditional | 103 HiLink verilogConditional Conditional |
118 HiLink verilogRepeat Repeat | 104 HiLink verilogRepeat Repeat |
119 HiLink verilogString String | 105 HiLink verilogString String |
120 HiLink verilogTodo Todo | 106 HiLink verilogTodo Todo |
121 HiLink verilogComment Comment | 107 HiLink verilogComment Comment |
122 HiLink verilogConstant Constant | 108 HiLink verilogConstant Constant |
123 HiLink verilogLabel Label | 109 HiLink verilogLabel Label |
124 HiLink verilogNumber Number | 110 HiLink verilogNumber Number |
125 HiLink verilogOperator Special | 111 HiLink verilogOperator Special |
126 HiLink verilogStatement Statement | 112 HiLink verilogStatement Statement |
127 HiLink verilogGlobal Define | 113 HiLink verilogGlobal Define |
128 HiLink verilogDirective SpecialComment | 114 HiLink verilogDirective SpecialComment |
129 HiLink verilogEscape Special | 115 HiLink verilogEscape Special |
130 | 116 |
131 delcommand HiLink | 117 delcommand HiLink |
132 endif | |
133 | 118 |
134 let b:current_syntax = "verilog" | 119 let b:current_syntax = "verilog" |
135 | 120 |
136 " vim: ts=8 | 121 " vim: ts=8 |