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comparison runtime/syntax/verilog.vim @ 3082:3502a7f991fc

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Updated runtime files.
author Bram Moolenaar <bram@vim.org>
date Wed, 14 Sep 2011 17:55:08 +0200
parents e6db096b07a1
children 43efa4f5a8ea
comparison
equal deleted inserted replaced
3081:1e50bdaa24f8 3082:3502a7f991fc
1 " Vim syntax file 1 " Vim syntax file
2 " Language: Verilog 2 " Language: Verilog
3 " Maintainer: Mun Johl <Mun.Johl@emulex.com> 3 " Maintainer: Mun Johl <Mun.Johl@emulex.com>
4 " Last Update: Fri Oct 13 11:44:32 PDT 2006 4 " Last Update: Wed Jul 20 16:04:19 PDT 2011
5 5
6 " For version 5.x: Clear all syntax items 6 " For version 5.x: Clear all syntax items
7 " For version 6.x: Quit when a syntax file was already loaded 7 " For version 6.x: Quit when a syntax file was already loaded
8 if version < 600 8 if version < 600
9 syntax clear 9 syntax clear
10 elseif exists("b:current_syntax") 10 elseif exists("b:current_syntax")
11 finish 11 finish
12 endif 12 endif
13 13
14 " Set the local value of the 'iskeyword' option 14 " Set the local value of the 'iskeyword' option.
15 " NOTE: '?' was added so that verilogNumber would be processed correctly when
16 " '?' is the last character of the number.
15 if version >= 600 17 if version >= 600
16 setlocal iskeyword=@,48-57,_,192-255 18 setlocal iskeyword=@,48-57,63,_,192-255
17 else 19 else
18 set iskeyword=@,48-57,_,192-255 20 set iskeyword=@,48-57,63,_,192-255
19 endif 21 endif
20 22
21 " A bunch of useful Verilog keywords 23 " A bunch of useful Verilog keywords
22 24
23 syn keyword verilogStatement always and assign automatic buf 25 syn keyword verilogStatement always and assign automatic buf
46 syn keyword verilogStatement wand weak0 weak1 wire wor xnor xor 48 syn keyword verilogStatement wand weak0 weak1 wire wor xnor xor
47 syn keyword verilogLabel begin end fork join 49 syn keyword verilogLabel begin end fork join
48 syn keyword verilogConditional if else case casex casez default endcase 50 syn keyword verilogConditional if else case casex casez default endcase
49 syn keyword verilogRepeat forever repeat while for 51 syn keyword verilogRepeat forever repeat while for
50 52
51 syn keyword verilogTodo contained TODO 53 syn keyword verilogTodo contained TODO FIXME
52 54
53 syn match verilogOperator "[&|~><!)(*#%@+/=?:;}{,.\^\-\[\]]" 55 syn match verilogOperator "[&|~><!)(*#%@+/=?:;}{,.\^\-\[\]]"
54 56
55 syn region verilogComment start="/\*" end="\*/" contains=verilogTodo,@Spell 57 syn region verilogComment start="/\*" end="\*/" contains=verilogTodo,@Spell
56 syn match verilogComment "//.*" contains=verilogTodo,@Spell 58 syn match verilogComment "//.*" contains=verilogTodo,@Spell
111 endif 113 endif
112 114
113 " The default highlighting. 115 " The default highlighting.
114 HiLink verilogCharacter Character 116 HiLink verilogCharacter Character
115 HiLink verilogConditional Conditional 117 HiLink verilogConditional Conditional
116 HiLink verilogRepeat Repeat 118 HiLink verilogRepeat Repeat
117 HiLink verilogString String 119 HiLink verilogString String
118 HiLink verilogTodo Todo 120 HiLink verilogTodo Todo
119 HiLink verilogComment Comment 121 HiLink verilogComment Comment
120 HiLink verilogConstant Constant 122 HiLink verilogConstant Constant
121 HiLink verilogLabel Label 123 HiLink verilogLabel Label
122 HiLink verilogNumber Number 124 HiLink verilogNumber Number
123 HiLink verilogOperator Special 125 HiLink verilogOperator Special
124 HiLink verilogStatement Statement 126 HiLink verilogStatement Statement
125 HiLink verilogGlobal Define 127 HiLink verilogGlobal Define
126 HiLink verilogDirective SpecialComment 128 HiLink verilogDirective SpecialComment
127 HiLink verilogEscape Special 129 HiLink verilogEscape Special
128 130
129 delcommand HiLink 131 delcommand HiLink
130 endif 132 endif
131 133